Descripción del título
Monografía
monografia Rebiun18958233 https://catalogo.rebiun.org/rebiun/record/Rebiun18958233 071023s2008 enka sb 001 0 eng 9780470060704 0470060700 UPCT u253339 CaPaEBR CaPaEBR UMA.RE Minns, Peter D. FSM-based digital design using Verilog HDL Recurso electrónico] Peter Minns, Ian Elliott Finite state machine based digital design using Verilog HDL Chichester, England Hoboken, NJ J. Wiley & Sons c2008 Chichester, England Hoboken, NJ Chichester, England Hoboken, NJ J. Wiley & Sons xiii, 391 p. ill. 26 cm + xiii, 391 p. E-Libro Includes bibliographical references and index Electronic reproduction. Palo Alto, Calif. ebrary 2009. Available via World Wide Web. Access may be limited to ebrary affiliated libraries Modo de acceso:World Wide Web Libros electrónicos Verilog (Computer hardware description language) Digital electronics Sequential machine theory Elliott, Ian D.