Descripción del título
Guide to FPGA Implementatio...
This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times (QA(B(3C(Band IP core designers interested in extending their catalog of specific components. The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption. This is not a book on algorithms. It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others. Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download
Monografía
monografia Rebiun08563253 https://catalogo.rebiun.org/rebiun/record/Rebiun08563253 120402s2012 ne | s |||| 0|eng d 9789400729872 978-94-007-2987-2 9789400729865 ed. impresa) UAM 991002824219704211 CBUC 991045026599706706 UMA.RE Deschamps, Jean-Pierre Guide to FPGA Implementation of Arithmetic Functions Recurso electrónico] by Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cant Servicio en línea Dordrecht Springer Netherlands 2012 Dordrecht Dordrecht Springer Netherlands XV, 469p. 591 illus. digital XV, 469p. 591 illus. Lecture Notes in Electrical Engineering 1876-1100 149 Basic Building Blocks -- Architecture of Digital Circuits -- Special Topics of Data Path Synthesis -- Control Unit Synthesis -- Electronic Aspects of Digital Design -- Electronic Aspects of Digital Design -- EDA Tools -- Adders -- Multipliers -- Dividers -- Other Operations -- Floating Point Arithmetic -- Finite-field Arithmetic -- Systems on Chip -- Embedded Systems Development: Case Studies -- Partial Reconfiguration on Xilinx FPGAs Acceso restringido a miembros del Consorcio de Bibliotecas Universitarias de Andalucía This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times (QA(B(3C(Band IP core designers interested in extending their catalog of specific components. The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption. This is not a book on algorithms. It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others. Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download Modo de acceso: World Wide Web Springer Engineering Software engineering Computer software Systems engineering Engineering Circuits and Systems Algorithm Analysis and Problem Complexity Special Purpose and Application-Based Systems Sutter, Gustavo D. Cant, Enrique SpringerLink (Online service) SpringerLink eBooks (Servicio en línea) Lecture Notes in Electrical Engineering (Servicio en línea) Springer eBooks Springer eBooks