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Variation-aware analog stru...
Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to domains such as robotics, financial engineering, automotive design, and more. The tools are for: Globally-reliable variation-aware automated sizing via SANGRIA, leveraging structural homotopy and response surface modeling. Template-free symbolic models via CAFFEINE canonical form functions, for greater insight into the relationship between design/process variables and circuit performance/robustness. Topology selection and topology synthesis via MOJITO. 30 well-known analog building blocks are hierarchically combined, leading to >100,000 different possible topologies which are all trustworthy by construction. MOJITO does multi-objective genetic programming-based search across these topologies with SPICE accuracy, to return a set of sized topologies on the optimal performance/yield tradeoff curve. Nonlinear sensitivity analysis, topology decision trees, and analytical tradeoffs. With a data-mining perspective on Pareto-optimal topologies, this book shows how to do global nonlinear sensitivity analysis on topology and sizing variables, automatically extract a specs-to-topology decision tree, and determine analytical expressions of performance tradeoffs. Novel topology design. The MOJITO-N and ISCLEs tools generate novel yet trustworthy topologies; including boosting digitally-sized circuits for analog functionality
Monografía
monografia Rebiun22022353 https://catalogo.rebiun.org/rebiun/record/Rebiun22022353 m o d | cr -n--------- 091016s2009 ne a ob 001 0 eng d 1-282-33275-9 9786612332753 90-481-2906-0 10.1007/978-90-481-2906-5 doi UPVA 996883668603706 UAM 991007780426804211 UCAR 991007922558904213 MiAaPQ MiAaPQ MiAaPQ eng TJFC bicssc TEC008010 bisacsh 621.3815028563 Variation-aware analog structural synthesis electronic resource] :] a computational intelligence approach Trent McConaghy ... [et al.]. Dordrecht New York Springer 2009 Dordrecht New York Dordrecht New York Springer 1 online resource (322 p.) 1 online resource (322 p.) Text txt computer c online resource cr Analog circuits and signal processing series Description based upon print version of record Includes bibliographical references (p. [277]-300) and index Variation-Aware Sizing: Background -- Globally Reliable, Variation-Aware Sizing: Sangria -- Knowledge Extraction in Sizing: Caffeine -- Circuit Topology Synthesis: Background -- Trustworthy Topology Synthesis: MOJITO Search Space -- Trustworthy Topology Synthesis: MOJITO Algorithm -- Knowledge Extraction in Topology Synthesis -- Variation-Aware Topology Synthesis and Knowledge Extraction -- Novel Variation-Aware Topology Synthesis -- Conclusion Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to domains such as robotics, financial engineering, automotive design, and more. The tools are for: Globally-reliable variation-aware automated sizing via SANGRIA, leveraging structural homotopy and response surface modeling. Template-free symbolic models via CAFFEINE canonical form functions, for greater insight into the relationship between design/process variables and circuit performance/robustness. Topology selection and topology synthesis via MOJITO. 30 well-known analog building blocks are hierarchically combined, leading to >100,000 different possible topologies which are all trustworthy by construction. MOJITO does multi-objective genetic programming-based search across these topologies with SPICE accuracy, to return a set of sized topologies on the optimal performance/yield tradeoff curve. Nonlinear sensitivity analysis, topology decision trees, and analytical tradeoffs. With a data-mining perspective on Pareto-optimal topologies, this book shows how to do global nonlinear sensitivity analysis on topology and sizing variables, automatically extract a specs-to-topology decision tree, and determine analytical expressions of performance tradeoffs. Novel topology design. The MOJITO-N and ISCLEs tools generate novel yet trustworthy topologies; including boosting digitally-sized circuits for analog functionality English Analog-to-digital converters- Computer-aided design Electronic circuit design- Computer-aided design Linear integrated circuits- Computer-aided design Electronic books McConaghy, Trent Analog Circuits and Signal Processing (CKB)3400000000128054 (DLC) (OCoLC) 2197-1854 94-007-2608-2 90-481-2905-2 Analog circuits and signal processing series