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Analog-baseband architectur...
With the past few decade efforts on lithography and integrated-circuit (IC) technologies, very low-cost microsystems have been successfully developed for many different applications. The trend in wireless communications is toward creating a networkubiquitous era in the years to come. Many unprecedented opportunities and challenges, such as Design for multi-standardability and low-voltage (LV) compliance, are rapidly becoming the mainstream directions in wireless-IC research and development, given that the former can offer the best connectivity among different networks, while the latter can facilitate the technology migration into the sub-1-V nanoscale regimes for further cost and power reduction. Analog-Baseband Architecturees and Circuits presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. The first part of the book reviews the physical layer specifications of modern wireless communication standards, presents the fundamental tradeoffs involved in transceiver architecture selection, and provides case studies of the state-of-the-art multistandard transceivers, where the key techniques reinforced are highlighted and discussed. A statistical summary (with 100+ references cited) of most used transmitter and receiver architectures for modern communication standards is provided. All the references are citied from the leading forums, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005. The second part focuses on the architectural design of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection technique is disclosed. It, through the reconfiguration of receiver and transmitter analog basebands, enables not only a relaxation of the RF frequency synthesizers and local oscillators design specifications, but also an efficient multistandard compliance by synthesizing the low-IF and zero-IF in the receiver; and the direct-up and two-step-up in the transmitter. The principle is d emonstrated in few design examples. One of them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not only has the two-step channel selection embedded, but also features a flexible-IF topology, a unique 3D-stack floorplan, and a particular design methodology for high testability and routability. The third part deals with the circuit design. In addition to the methodical description of many LV circuit techniques, 3 tailormade LV-robust functional blocks are presented. They include: 1) a double-quadrature-downconversion filter (DQDF) - it realizes concurrently clock-rate-defined IF reception, I/Q demodulation, IF channel selection and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) - it offers a transient-free constant-bandwidth gain adjustment. 3) An inside-OpAmp dc-offset canceler - it saves the silicon area required for realizing a large time constant on chip while maximizing its highpass-pole switchability for fast dc-offset transient. The last part presents experimental results of the 3 tailor-made building blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS process. Previously untold on-/off-chip co-setup for both full-chip and building blocks measurements are described. Not only the building blocks have successfully extended the state-of-the-art boundary in terms of signal bandwidth and supply voltage, the analog-baseband IC has been so far the lowest-voltage-reported solution for IEEE 802.11a/b/g WLAN receivers
Monografía
monografia Rebiun25201118 https://catalogo.rebiun.org/rebiun/record/Rebiun25201118 m o d cr cn||||||||| 071219s2007 ne a ob 000 0 eng d 1073051932 1105588821 9781402064333 1402064330 NZ1 12923175 978-1-4020-6432-6 Springer http://www.springerlink.com GW5XE eng pn GW5XE GW5XE YDXCP UV0 TEX OCLCQ OCLCF OCLCO BEDGE OCLCQ UAB ESU OCLCQ U3W ICG CEF YOU OCLCQ AUD WURST LQU 621.3815 22 Analog-baseband architectures and circuits for multistandard and low-voltage wireless transceive Pui-In Mak, Seng-Pan U, Rui Paulo Martins Dordrecht, the Netherlands Springer Verlag 2007 Dordrecht, the Netherlands Dordrecht, the Netherlands Springer Verlag 1 online resource (xxi, 178 pages) illustrations 1 online resource (xxi, 178 pages) Text txt rdacontent computer c rdamedia online resource cr rdacarrier Analog circuits and signal processing series Includes bibliographical references Transceiver Architecture Selection -- Review, State-Of-The-Art Survey And Case Study -- Two-Step Channel Selection -- A Technique For Multistandard Transceiver Front-Ends -- System Design Of A Sip Receiver For Ieee 802.11a/B/G Wlan -- Low-Voltage Analog-Baseband Techniques -- An Experimental 1-V Sip Receiver Analog-Baseband Ic For Ieee 802.11a/B/G Wlan -- Conclusions With the past few decade efforts on lithography and integrated-circuit (IC) technologies, very low-cost microsystems have been successfully developed for many different applications. The trend in wireless communications is toward creating a networkubiquitous era in the years to come. Many unprecedented opportunities and challenges, such as Design for multi-standardability and low-voltage (LV) compliance, are rapidly becoming the mainstream directions in wireless-IC research and development, given that the former can offer the best connectivity among different networks, while the latter can facilitate the technology migration into the sub-1-V nanoscale regimes for further cost and power reduction. Analog-Baseband Architecturees and Circuits presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. The first part of the book reviews the physical layer specifications of modern wireless communication standards, presents the fundamental tradeoffs involved in transceiver architecture selection, and provides case studies of the state-of-the-art multistandard transceivers, where the key techniques reinforced are highlighted and discussed. A statistical summary (with 100+ references cited) of most used transmitter and receiver architectures for modern communication standards is provided. All the references are citied from the leading forums, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005. The second part focuses on the architectural design of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection technique is disclosed. It, through the reconfiguration of receiver and transmitter analog basebands, enables not only a relaxation of the RF frequency synthesizers and local oscillators design specifications, but also an efficient multistandard compliance by synthesizing the low-IF and zero-IF in the receiver; and the direct-up and two-step-up in the transmitter. The principle is d emonstrated in few design examples. One of them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not only has the two-step channel selection embedded, but also features a flexible-IF topology, a unique 3D-stack floorplan, and a particular design methodology for high testability and routability. The third part deals with the circuit design. In addition to the methodical description of many LV circuit techniques, 3 tailormade LV-robust functional blocks are presented. They include: 1) a double-quadrature-downconversion filter (DQDF) - it realizes concurrently clock-rate-defined IF reception, I/Q demodulation, IF channel selection and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) - it offers a transient-free constant-bandwidth gain adjustment. 3) An inside-OpAmp dc-offset canceler - it saves the silicon area required for realizing a large time constant on chip while maximizing its highpass-pole switchability for fast dc-offset transient. The last part presents experimental results of the 3 tailor-made building blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS process. Previously untold on-/off-chip co-setup for both full-chip and building blocks measurements are described. Not only the building blocks have successfully extended the state-of-the-art boundary in terms of signal bandwidth and supply voltage, the analog-baseband IC has been so far the lowest-voltage-reported solution for IEEE 802.11a/b/g WLAN receivers Electronic analog computers- Circuits Electronic circuit design Mobile communication systems Ingénierie. Electronic analog computers- Circuits. Electronic circuit design. Mobile communication systems. engineering circuits Engineering (General) Techniek (algemeen) Electronic books U, Seng-Pan Martins, Rui Paulo Mak, Pui-in Print version Analog-baseband architectures and circuits for multistandard and low-voltage wireless transceive. Dordrecht, the Netherlands : Springer Verlag, 2007 9781402064326 1402064322 (OCoLC)166358180 Analog circuits and signal processing series